Intel® High Level Synthesis Compiler Pro Edition: Version 24.1 Release Notes

ID 683682
Date 4/01/2024
Public

1. Intel® High Level Synthesis Compiler Pro Edition Version 24.1 Release Notes

Updated for:
Intel® Quartus® Prime Design Suite 24.1

The Intel® High Level Synthesis Compiler Pro Edition Release Notes provide late-breaking information about the Intel® High Level Synthesis Compiler Pro Edition Version 24.1.

Product Discontinuance Notification

Attention:

Intel is discontinuing the Intel® High Level Synthesis (HLS) Compiler software product. For details, refer to Product Discontinuance Notice PDN2404 .

To keep access to the latest FPGA high-level design features, optimizations, and development utilities, migrate your existing designs to use the Intel® oneAPI Base Toolkit. For more information about using the Intel® oneAPI Base Toolkit with FPGA devices, refer to Intel® oneAPI DPC++/C++ Compiler Handbook for Intel® FPGAs .

Visit the Intel® oneAPI product page for migration advice, or go to the Intel® High Level Design community forum for any questions or requests.

About the Intel® HLS Compiler Pro Edition Documentation Library

Documentation for the Intel® HLS Compiler Pro Edition is split across a few publications. Use the following table to find the publication that contains the Intel® HLS Compiler Pro Edition information that you are looking for:
Table 1.   Intel® High Level Synthesis Compiler Pro Edition Documentation Library
Title and Description
Release Notes

Provides late-breaking information about the Intel® HLS Compiler.

Link
Getting Started Guide

Get up and running with the Intel® HLS Compiler by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the Intel® HLS Compiler.

Link
User Guide

Provides instructions on synthesizing, verifying, and simulating intellectual property (IP) that you design for Intel FPGA products. Go through the entire development flow of your component from creating your component and testbench up to integrating your component IP into a larger system with the Intel Quartus Prime software.

Link
Best Practices Guide

Provides techniques and practices that you can apply to improve the FPGA area utilization and performance of your HLS component. Typically, you apply these best practices after you verify the functional correctness of your component.

Link
Reference Manual

Provides reference information about the features supported by the Intel HLS Compiler. Find details on Intel® HLS Compiler command options, header files, pragmas, attributes, macros, declarations, arguments, and template libraries.

Link