Article ID: 000075226 Content Type: Product Information & Documentation Last Reviewed: 04/04/2023

How does the rx_st_mask signal affect the behavior of the Hard IP for PCI Express in Arria 10?

Environment

  • Quartus® II Subscription Edition
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    Description The Avalon®-ST variant of the Altera® Arria® 10 Hard IP for PCI® Express includes the signal rx_st_mask.  As stated in the user guide description, you can use this signal to stop sending non-posted requests.
    Resolution

    This signal stalls non-posted TLPs. All other TLP types continue to be forwarded to the Application Layer.

    The stalled non-posted TLPs are held in the RX buffer until the mask signal is deasserted.  They are not discarded.

    When used in a Root Port mode, the rx_st_mask signal stalls all IO read, memory read, and configuration accesses (non-posted transactions).

    Related Products

    This article applies to 3 products

    Intel® Arria® 10 GT FPGA
    Intel® Arria® 10 GX FPGA
    Intel® Arria® 10 SX SoC FPGA

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