Critical Issue
Due to a problem in the Intel® Quartus® Prime Pro Edition software version 21.2, you may experience an error while reconfiguring or performing a CVP update on your device if there is no stable free running clock signal on the reference clock pins (REFCLK_GXR[R,L [14A,14C,15A,15C]_CH[0,1]P) of the R-Tile before going through the reconfiguration process.
The problem will not affect your device during the first configuration process even if there is no stable free running clock signal on the reference clock pins (REFCLK_GXR[R,L [14A,14C,15A,15C]_CH[0,1]P).
To work around this problem, provide an stable free running clock signal on the reference clock pins (REFCLK_GXR[R,L [14A,14C,15A,15C]_CH[0,1]P) of the R-Tile before starting a device reconfiguration operation.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.