Article ID: 000080814 Content Type: Error Messages Last Reviewed: 12/19/2018

Error(20263): Placement failed to find a legal solution for XXXX LABs, X M20Ks and X DSPs in the locations from (X, X) to (XXX, XXX).

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You may see this error in the Intel® Quartus® Prime Pro edition version 18.1 when compiling for the Intel® Stratix® 10 devices with a high utilization or large number of logic lock regions.

    Resolution

    The following assigment may help to place the design:

    set_global_assignment -name GLOBAL_PLACEMENT_EFFORT "OPTIMIZE FOR HIGH UTILIZATION"

    This assignment is automatically included in the Intel® Quartus® Prime Pro Edition version 18.1 Update 1 and later.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs