Description
If a .sof image is first loaded into the FPGA (using sof2flash or JTAG) when compression and CvP Update are enabled, the above error will be seen when the second core image (.core.rbf) is loaded over PCI Express.
This is due to the fact that .sof files are always un-compressed. Hence if the first configuration is uncompressed, the FPGA configuration control block requires that subsequent configuration files are the same.
Resolution
If CvP Update mode and compression are required, ensure that the first image loaded into the FPGA uses compression (use a .pof or .jic file when programming the flash device). Ensure that the MSEL pins are correct for your required configuration scheme.