When targeting Stratix® II device MRAM blocks in ×28 and ×44 modes, byte enables are only supported when using single clock mode. If you implement the memory in x128 or x144 mode with byte enables and dual clocks, Quartus® II software will implement a workaround that will allow you to configure the memory in this mode. Doing so will double the resources consumed by this RAM.
The correct resource usage is reflected in the Quartus II software MegaWizard® Plug-In Manager version 7.1 and later.
Refer to the Stratix II FPGA Family Errata Sheet (PDF) for more information.