Article ID: 000082187 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why is the setup multicycle for the paths from [get_keepers {*|PCIeCore_core:wrapper|altpcie_hip_pipen1b:altpcie_hip_pipen1b_inst|tl_cfg_ctl[*]}] the same as hold multicycle?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You may see the following warning in the Setup/Hold Multicycle Consistency section of the Check Timing report when you compile a design targeting Stratix® IV GX or HardCopy® IV GX device families that contains a Hard IP for PCI Express® in Quartus® II software version 11.1 or before. The multicycle constraint is included in the SDC file for the Hard IP block.

    ; -from [get_keepers {*|PCIeCore_core:wrapper|altpcie_hip_pipen1b:altpcie_hip_pipen1b_inst|tl_cfg_ctl[*]}] ; Setup multicycle for this path is same as hold multicycle. 

    The warning can safely be ignored since those constraints have the same setup and hold multicycle values by design.

    The warning is scheduled to be suppressed in a future version of Quartus II software.

    Related Products

    This article applies to 2 products

    Stratix® IV GX FPGA
    HardCopy™ IV GX ASIC Devices