Article ID: 000083861 Content Type: Troubleshooting Last Reviewed: 03/20/2023

Why does my Configuration via Protocol (CvP) design fail link training and not load the core image when I use a SOF from a Quartus® II software v13.0 or lower in CvP Initialization mode?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    There is a known problem with the Convert Programming files conversion of the SRAM Object File (.sof) from the Quartus® II software version 12.0 through 12.1sp1. The Disable EPCS ID check was enabled from version 12.0 through 12.1sp1, which caused the problem with link training and loading of the core image.

    Resolution

    To wor karound this issue in the Quartus II software version 12.0 through 12.1 sp1, go to the Advanced tab of the the Convert Programming Files window and check the checkbox labeled Disable EPCS ID check

    In the Quartus II software version 13.0 and beyond, the Disable EPCS ID check is correctly set to disable.

    This problem is fixed in the Quartus® II software version 14.0.

    Related Products

    This article applies to 3 products

    Stratix® V GS FPGA
    Stratix® V GT FPGA
    Stratix® V GX FPGA