Article ID: 000084040 Content Type: Troubleshooting Last Reviewed: 05/17/2023

Enabling slow slew rate option for EMIF Addr/Cmd and CK

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When using the Intel® Arria® 10 FPGA External Memory Interface (EMIF) IP to implement a DDR3 or DDR4 memory interface with fly-by topology, depending on your board topology, you might see sub-optimal signal integrity for the address and command signals due to signal overshoots and undershoots.  You might be able to improve signal integrity by configuring the affected address and command pins to use a slow slew rate. The EMIF IP and the Quartus® II software by default choose a fast slew rate for I/O buffers.

    In a future version of the IP, you will be able to specify the slew rate directly from the EMIF generation GUI.  This option is not available in the Quartus software version 14.1 and 14.1a10s, however, you can still implement a slow slew rate by adding assignments manually, either via the assignment editor or by directly editing the .QSF.

    Resolution

    Follow these steps to specify the slow slew rate for a top-level pin with name PIN_NAME:

    1. Regenerate the IP after changing the Address/Command OCT settings to UNCALIBRATED termination in the EMIF IP GUI.
    2. Set set_instance_assignment -name SLEW_RATE 0 -to PIN_NAME.
      (You need to repeat this assignment for all the affected address and command pins.)
    3. Slow slew rate is only supported when an output buffer does not use on-chip termination (OCT), either calibrated or non-calibrated.  If your address and command pins use OCT, you must disable output termination to use slow slew rate.
      You can do so via the OUTPUT_TERMINATION and the CURRENT_STRENGTH_NEW assignment. For example:


    set_instance_assignment -name OUTPUT_TERMINATION OFF -to PIN_NAME
    set_instance_assignment -name CURRENT_STRENGTH_NEW desired_current_strength -to PIN_NAME (If adding this assignment in Assignment Editor, then use the CURRENT_STRENGTH setting, Quartus will automatically add the CURRENT_STRENGTH_NEW in the QSF file).

    where desired_current_strength is the value of the current strength of the pin, for example, "8mA".

    1. Certain I/O standards (e.g. SSTL-12, SSTL-15) do not support disabling output termination. To use slow slew rate, you also need to override the I/O standard to one that supports fixed-current output.  For example, for 1.2V DDR4, use the following assignment:

    set_instance_assignment -name IO_STANDARD "1.2-V" -to PIN_NAME

    and for 1.5V DDR3, use the following assignment:

    set_instance_assignment -name IO_STANDARD "1.5-V" -to pin_name

    Related Products

    This article applies to 3 products

    Intel® Arria® 10 GT FPGA
    Intel® Arria® 10 GX FPGA
    Intel® Arria® 10 SX SoC FPGA