You may see this warning generated by the EDA Netlist Writer in the Quartus® II software when creating IBIS models for Stratix® III devices, specifically for dedicated clock input pins.
You will need to manually edit the .ibs file generated by the Quartus II software to add the appropriate IBIS model for the dedicated clock input pins. The Stratix III IBIS models can be downloaded from Altera IBIS Models. Locate the appropriate model for the I/O standard you are using in your project for the dedicated clock input pins. You should select a model from the following suffixes based on the clock pin location in your design:
- rrin - use for clock input pins on left or right sides of the device (row receiver input).
- cin - use for clock input pins on the top or bottom sides of the device (column input).
Copy the entire model beginning at the [MODEL] keyword and paste into the .ibs file generated by the Quartus II software. Input models contain the following sections:
- Model
- Temperature Range
- Voltage Range
- GND Clamp
- Power Clamp
Once the appropriate model has been copied to the .ibs file, you can edit the Component - Pin section to add the clock pin location, signal name, and model name.