Due to a problem in the Intel® Quartus® Prime Pro Edition software version 19.1, you may see this error message in projects that include the LVDS SERDES Intel® FPGA IP configured in External PLL Mode.
The error may be seen even if the Quartus® Prime IP File (.qip) of the IOPLL Intel® FPGA IP is listed before the '.qip' file of the LVDS SERDES Intel® FPGA IP in the project Quartus® Prime Settings File (.qsf).
A patch is available to fix this problem for the Intel® Quartus® Prime Edition Pro software version 19.1
Download and install Patch 0.19 for the Intel® Quartus® Prime Edition Pro software version 19.1 from the appropriate link below
(To download .run file, right-click on the above link and choose “Save link as”)
Intel® Quartus® Prime Edition Pro software version 19.1 patch
- Download patch 0.19 for Windows (.exe)
- Download patch 0.19 for Linux (.run)
- Download the Readme for patch 0.19 (.txt)
This problem is fixed starting with in the Intel® Quartus® Prime Pro Edition software version 19.2.