Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.1 and earlier, if your F-tile System PLL reference clock experiences discontinuity or temporary loss condition, you might observe the Intel Agilex® 7 device fails to reconfigure.
Intel recommends you provide a stable reference clock throughout the design operation once your reference clock for the F-tile System PLL is available.
If you cannot adhere to this, you must reconfigure the device.
To work around this problem, you should try configuring your device again if your first reconfiguration fails.
This problem will be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.