FPGA Design Software Resource Centers
The FPGA Software Resources linked on the page are divided into functional areas according to the FPGA design flow.
Resource Centers | Description |
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Intel® FPGA Licensing Support Center | Instructions to guide you through the licensing process and help you make the most of your FPGA experience. Whether you are new or an existing user, this page will provide you with all the essential information to get started quickly. |
Intel® Quartus® Prime and Quartus® II Software Scripting Support | Provides resources that includes comprehensive scripting support for command-line and tool command language (Tcl) script design flows. |
I/O Management and Board Development Support Center | Provides Documentation, Training and Tools for early I/O planning and sign-off. |
Design Entry and Planning Resource Center | Provides guidelines on planning and structuring your design, as well as details about managing metastability in your design, and HDL coding styles that can have a significant effect on the quality of your design's results. |
Synthesis and Netlist Viewers Resource Center | Provides Documentation for advanced integrated synthesis and interfaces with other third-party synthesis tools. |
Incremental Compilation Resource Center | Provides instructions for incremental compilation feature that includes incremental design methodology for high-density FPGAs. |
Optimization Support Resources | Provides instructions for design optimization to help improve performance to reduce resource usage, close timing, and reduce compilation times. |
Early Power Estimators (EPE) and Power Analyzer | Provides Early Power Estimators, Intel® FPGA Power and Thermal Calculator, and the Power Analyzer to give you the ability to estimate power consumption |
Timing Analyzer Resource Center | Provides instructions and resources for Timing Analyzer is an ASIC-strength static timing analyzer that supports the industry-standard Synopsys® Design Constraints (SDC) format. |
Classic Timing Analyzer Resource Center | Provides instructions for Quartus® II software includes the classic timing analyzer that combines powerful features with ease-of-use. |
On-chip Debugging Resource Center | Provides links to available documentation about on-chip debugging tools. The on-chip debugging tools allow real-time capture of internal nodes in your design to help you verify your design quickly without the use of external equipment. |
EDA Tool Support Resource Center |
The Intel EDA ecosystem ensures that you have a complete design solution in designing, verifying, and integrating Intel® FPGAs into your systems. |