Stratix® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683665
Date 10/18/2023
Public
Document Table of Contents

8.10. JTAG Configuration

In Stratix® V devices, JTAG instructions take precedence over other configuration schemes.

The Intel® Quartus® Prime software generates an SRAM Object File (.sof) that you can use for JTAG configuration using a download cable in the Intel® Quartus® Prime software programmer. Alternatively, you can use the JRunner software with .rbf or a JAM™ Standard Test and Programming Language (STAPL) Format File (.jam) or JAM Byte Code File (.jbc) with other third-party programmer tools.

Note: You cannot use the Stratix® V decompression or design security features if you are configuring your Stratix® V device using JTAG-based configuration.

The chip-wide reset (DEV_CLRn) and chip-wide output enable (DEV_OE) pins on Stratix® V devices do not affect JTAG boundary-scan or programming operations.