AN 919: Improving Quality of Results with Design Assistant

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ID 683369
Date 4/26/2024
Public
Document Table of Contents
Document Table of Contents x
Improving Quality of Results with Design Assistant Document Revision History for AN 919: Improving Quality of Results with Design Assistant Appendix A: Running Design Assistant Appendix B: Design Assistant Rules
Improving Quality of Results with Design Assistant x
About Design Assistant About the Design Assistant Design Example Fixing SDC and CDC Rules in the Design Assistant Design Example Fixing Other Faults in the Design Assistant Design Example
Appendix A: Running Design Assistant x
Running Design Assistant
Appendix B: Design Assistant Rules x
Timing Closure Rules Clock Domain Crossing and Reset Domain Crossing Rules Intrinsic Margin Rules Combinatorial Logic Levels Reducing High Fan-out Nets Hyper-Retimer Restrictions Initial Power-Up Conditions Rules Reset Release Intel FPGA IP
Reducing High Fan-out Nets x
Duplication Rules Tension and Span Rules
Initial Power-Up Conditions Rules x
Removing Initial Power-Up Conditions
Improving Quality of Results with Design Assistant
Document Revision History for AN 919: Improving Quality of Results with Design Assistant
Appendix A: Running Design Assistant
Appendix B: Design Assistant Rules

Tension and Span Rules

The tension and span rules help identify areas of the design that may be difficult for the fitter to place, even if they are meeting timing.

These rules identify registers with sinks that are pulling it in various directions, making it difficult to find an optimal placement.

Registers that fail these rules are good candidates for register duplication. They are low priority rules. Your design can still be meeting timing even if these rules are violating, but they help identify the areas of the design that can contribute to congestion. When looking for places for further optimization, these are good candidates.

Figure 23. TensionTension is the sum over each sink (either immediate fanout or timing endpoint, depending on the rule) of the distance of the sink from the centroid of all the sinks.

Figure 24. Span Span is the maximum one-dimensional delta between the left-bottom-most sink with the right-top-most sink.

The rules are:

  • TMC-20601 – Registers with High Fan-out Tension
  • TMC-20602 – Registers with High Endpoint Tension
  • TMC-20603 – Registers with High Fan-out Span
  • TMC-20604 – Registers with High Endpoint Span

Duplicating these signals where possible allows Quartus® Prime to find a better solution.

Figure 25. High Tension Fanout Signal
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