Arria® 10 FPGA Development Kit User Guide

ID 683526
Date 5/15/2024
Public
Document Table of Contents

3.2. Default Switch and Jumper Settings

This topic shows you how to restore the default factory settings and explains their functions.
CAUTION:
Do not install or remove jumpers (shunts) while the development board is powered on.
Figure 5. Default Switch and Jumper Settings on the Top
Figure 6. Default Switch Settings on the Bottom
  1. Set DIP switch bank (SW3) to match the following table.
    Table 3.  SW3 DIP PCIe Switch Default Settings (Board Top)
    Switch Board Label Function Default Position
    1 x1 ON for PCIe x1 ON
    2 x4 ON for PCIe x4 ON
    3 x8 ON for PCIe x8 ON
    4 OFF for 1.35 V MEM_VDD power rail OFF

  2. If all of the jumper blocks are open, the FMCA and FMCB VCCIO value is 1.2 V. To change that value, add shunts as shown in the following table.
    Table 4.  Default Jumper Settings for the FPGA Mezzanine Card (FMC) Ports (Board Top)
    Board Reference Board Label Description
    J8 pins 1-2 1.35V 1.35 V FMCB VCCIO select
    J8 pins 3-4 1.5V 1.5 V FMCB VCCIO select
    J8 pins 5-6 1.8V 1.8 V FMCB VCCIO select
    J11 pins 1-2 1.35V 1.35 V FMCA VCCIO select
    J11 pins 3-4 1.5V 1.5 V FMCA VCCIO select
    J11 pins 5-6 1.8V 1.8 V FMCA VCCIO select

  3. Set DIP switch bank (SW4) to match the following table.
    Table 5.  SW4 JTAG DIP Switch Default Settings (Board Bottom)
    Switch Board Label Function Default Position
    1 Arria® 10 OFF to enable the Arria® 10 in the JTAG chain OFF
    2 MAX V OFF to enable the MAX V in the JTAG chain OFF
    3 FMCA ON to bypass the FMCA connector in the JTAG chain ON
    4 FMCB ON to bypass the FMCB connector in the JTAG chain ON

  4. Set DIP switch bank (SW5) to match the following table.
    Table 6.  SW5 DIP Switch Default Settings (Board Bottom)
    Switch Board Label Function Default Position
    1 MSEL0 OFF for MSEL0 = 1; for FPP standard mode OFF
    2 MSEL1 ON for MSEL1 = 0; for FPP standard mode ON
    3 MSEL2 ON for MSEL2 = 0; for FPP standard mode ON
    4 VIDEN OFF for enabling VID_EN for the Smart Voltage ID (SmartVID) feature ON

  5. Set DIP switch bank (SW6) to match the following table.
    Table 7.  SW6 DIP Switch Default Settings (Board Bottom)
    Switch Board Label Function Default Position
    1 CLK_SEL ON for 100 MHz on-board clock oscillator selection

    OFF for SMA input clock selection

    ON
    2 CLK_EN OFF for setting CLK_ENABLE signal high to the MAV V OFF
    3 Si516_FS ON for setting the SDI REFCLK frequency to 148.35 MHz

    OFF for setting the SDI REFCLK frequency to 148.5 MHz

    OFF
    4 FACTORY ON to load factory image from flash

    OFF to load user image #1 from flash

    ON
    5 RZQ_B2K ON for setting RZQ resistor of Bank 2K to 99.17 ohm

    OFF for setting RZQ resistor of Bank 2K to 240 ohm

    OFF