Arria® 10 FPGA Development Kit User Guide

ID 683526
Date 5/15/2024
Public
Document Table of Contents

6.5.2. User-Defined DIP Switch

The Arria® 10 GX FPGA development board includes a set of eight-pin DIP switch. There are no board-specific functions for these switches. When the switch is in the OFF position, a logic 1 is selected. When the switch is in the ON position, a logic 0 is selected.

Table 20.  User-Defined DIP Switch Schematic Signal Names and Functions

Board Reference

Schematic Signal Name

FPGA Pin Number

I/O Standard

1

USER_DIPSW0

A24

1.8 V

2

USER_DIPSW1

B23

1.8 V

3

USER_DIPSW2

A23

1.8 V

4

USER_DIPSW3

B22

1.8 V

5

USER_DIPSW4

A22

1.8 V

6

USER_DIPSW5

B21

1.8 V

7

USER_DIPSW6

C21

1.8 V

8

USER_DIPSW7

A20

1.8 V