AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 790711
Date 2/12/2024
Public

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7.3.2.4. APP BP CYCLES

The register indicates back pressure cycles observed because application logic connected to H2C block was not ready to accept transactions.

Default Value: 0x0000_0000

Table 78.  APP BP Registers
Register Name Bit Attribute User Side Description
APP BP CYCLES 30-0 RW1C Back Pressure Cycle Count
31 RW1C Indicates Overflow, cycle count reached 31'h7FFFFFFFF