DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 9/02/2022
Public

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Document Table of Contents

9.87. btc_dptxll_syslib_add_tx

Prototype:

int btc_dptxll_syslib_add_tx( 
   BYTE         tx_idx, 
   unsigned int max_link_rate,       
   unsigned int max_lane_count,  
   unsigned int tx_num_of_sources, 
   BYTE *edid_buf)

Thread-safe:

No

Available from ISR:

No

Include:

< btc_dptxll_syslib.h >

Return:

0 = success, 1 = fail

Parameters:

  • tx_idx—Source instance index (0 - 3)
  • max_link_rate—Maximum supported link rate. 0x06 = 1.62 Gbps; 0x0A = 2.70 Gbps; 0x14 = 5.40 Gbps
  • max_lane_count—Maximum supported lane count. 1, 2 or 4
  • tx_num_of_sources—Maximum number of supported MST stream source (1-4)
  • edid_buf—Pointer to a 512 byte user-allocated EDID data buffer. Each source instance requires its own user-allocated EDID buffer to store the EDID of the connected sink

Description:

This function declares a source (TX) instance to the system library. It should be invoked once for each existing source instance, starting from tx_idx = 0. After all sources have been declared, invoke btc_dptxll_syslib_ init ( ).

Example:

btc_dptxll_syslib_add_tx(0, 0x14, 4, DP_TX_SOURCE_MAX_NUM_OF_STREAMS, p_data);