DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 9/02/2022
Public

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10.3.10. DPTX_TEST_264BIT_PATTERN5

Address: 0x0019

Direction: RW

Reset: 0x00000000

Table 90.  DPTX_TEST_264BIT_PATTERN5 Bits

Bit

Bit Name

Function

31:0

264BIT_PATTERN5

Bits 159:128 of the 264 bit custom pattern for PHY compliance test.