External Memory Interfaces Stratix® 10 FPGA IP User Guide

ID 683741
Date 4/01/2024
Public
Document Table of Contents

7.5.2. Channel Signal Integrity Measurement

As external memory interface data rates increase, so does the importance of proper channel signal integrity measurement. By measuring the actual channel loss during the layout process and including that data in your parameterization, a realistic assessment of margins is achieved.