External Memory Interfaces Stratix® 10 FPGA IP User Guide

ID 683741
Date 4/01/2024
Public
Document Table of Contents

4.1.5.9. oct for RLDRAM 3

On-Chip Termination (OCT) interface

Table 147.  Interface: octInterface type: Conduit
Port Name Direction Description
oct_rzqin Input Calibrated On-Chip Termination (OCT) RZQ input pin